These days, a flash memory, which is a large-capacity and inexpensive nonvolatile semiconductor memory device, is expanding the use and market as a storage memory such as a memory card and a semiconductor disk (SSD; solid state disk). In a NAND flash memory, the upper portion of a silicon substrate is partitioned into a plurality of linear portions and the linear portion is used as an active area. A plurality of memory cells are formed in each active area, and a pair of select gate electrodes are provided on both sides of the plurality of memory cells. A bit line and a source line are provided above the silicon substrate to be connected to the active area. At this time, at least the bit line is connected to the active area via a contact.
A still larger capacity and lower cost are required for the storage memory, and reducing the processing dimensions has been advanced in order to achieve them. However, when the downsizing of the memory is advanced and the arrangement period of the active area is shortened, the distance between the contact (CB) connected to an active area and an active area (AA) disposed adjacent to the active area is shortened, and the breakdown voltage therebetween is decreased. Therefore, the arrangement period of the active area cannot be shortened much, and this leads to a limitation on the downsizing.